Service-oriented architecture

http://en.wikipedia.org/wiki/SOA_Security
http://en.wikipedia.org/wiki/Service-oriented_architecture
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Elements of SOA, by Dirk Krafzig, Karl Banke, and Dirk Slama^[16]

SOA meta-model, The Linthicum Group, 2007

Service-Oriented Modeling Framework (SOMF) Version 2.0

SOA enables the development of applications that are built by combining loosely coupled and interoperable services.^[17]
These services inter-operate based on a formal definition (or contract, e.g., WSDL) that is independent of the underlying platform and programming language. The interface definition hides the implementation of the language-specific service. SOA-based systems can therefore function independently of development technologies and platforms (such as Java, .NET, etc.). Services written in C# running on .NET platforms and services written in Java running on Java EE platforms, for example, can both be consumed by a common composite application (or client). Applications running on either platform can also consume services running on the other as web services that facilitate reuse. Managed environments can also wrap COBOL legacy systems and present them as software services. This has extended the useful life of many core legacy systems indefinitely^{[citation needed]}, no matter what language they originally used. SOA can support integration and consolidation activities within complex enterprise systems, but SOA does not specify or provide a methodology or framework for documenting capabilities or services.
High-level languages such as BPEL and specifications such as WS-CDL and WS-Coordination extend the service concept by providing a method of defining and supporting orchestration of fine-grained services into more coarse-grained business services, which architects can in turn incorporate into workflows and business processes implemented in composite applications or portals^{[citation needed]}.
As of 2008 researchers have started investigating the use of service component architecture (SCA) to implement SOA.
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64 bit processor architectures

The original IA-32 instruction set has been evolved over time with the addition of the multimedia instruction updates. Many new architectures, including 64-bit ones, have since succeeded IA-32.
However, the ultimate evolution of IA-32 was when it was extended again to 64-bits, but of course at that point it cannot be called IA-32 anymore; the 64-bit extension is called x86-64. It could not be called IA-64 as Intel had already used this label for the Itanium design (a design which is not really an evolution of the IA-32 architecture). AMD's AMD64 was the first x86-64 instruction set designed. Later, Intel followed by imitating AMD's design with what they call Intel 64 (formerly IA-32e and EM64T).

IA-64

Main article: IA64

Intel's IA-64 architecture is not directly compatible with the IA-32 instruction set, despite having a similar name. It completely discards all IA-32 instructions, and starts from scratch with a completely different instruction set as well as using a VLIW design instead of out-of-order execution. IA-64 is the architecture used by the Itanium line of processors. Itanium initially had hardware-support for IA-32, but it was very slow. Intel shifted to the use of a software emulator instead. The nomenclature "IA-64" means "Intel Architecture, 64-bit", but the connection with IA-32 is only in the name.
Further improvements are:

• Sixteen times the number of general purpose registers (now 128)
• Sixteen times the number of floating point registers (now 128)
• Register rotation mechanism to keep values in registers over function calls

AMD64

Main article: x86-64

AMD's AMD64 instruction set, initially called x86-64, is largely built on top of IA-32, and thus maintains the x86 family heritage, despite having a different name. While extending the instruction set, AMD took the opportunity to clean up some of the odd behavior of this instruction set that has existed since its earliest 16-bit days, while the processor is operating in 64-bit mode.
Further improvements are:

• Two times the number of general purpose registers (now 16)
• Two times the number of SSE registers (now 16)
• The general purpose registers are now truly general-purpose registers and are no longer restricted.
• Most of the functionality of the segment registers has been
  deprecated, since their usage has steadily declined even during the
  IA-32 days.

Intel 64

Main article: x86-64#Intel_64

By February 2004, Intel announced the Intel 64 instruction set, formerly known as Yamhill. It was derived from AMD's AMD64.
Intel 64 is generally compatible with code written for the AMD64, though it lacks some AMD64 features. Intel started using the set starting with the Xeon Nocona core in late 2004, introducing it to the desktop market with the Pentium 4 E0 revision in early 2005.

IA-64 = Intel Itanium Architecture

Itanium is the brand name for 64-bit Intel microprocessors that implement the Intel Itanium architecture (formerly called IA-64). Intel has released two processor families using the brand: the original Itanium and the Itanium 2. Starting November 1, 2007, new members of the second family are again called Itanium. The processors are marketed for use in enterprise servers and high-performance computing systems. The architecture originated at Hewlett-Packard (HP) and was later developed by HP and Intel together.

Itanium's architecture differs dramatically from the x86 architectures (and the x86-64 extensions) used in other Intel processors. The architecture is based on explicit instruction-level parallelism, with the compiler making the decisions about which instructions to execute in parallel. This approach allows the processor to execute up to six instructions per clock cycle. By contrast with other superscalar architectures, Itanium does not have elaborate hardware to keep track of instruction dependencies during parallel execution - the compiler must keep track of these at build time instead.

After a protracted development process, the first Itanium was released in 2001, and more powerful Itanium processors have been released periodically. HP produces most Itanium-based systems, but several other manufacturers have also developed systems based on Itanium. As of 2007, Itanium is the fourth-most deployed microprocessor architecture for enterprise-class systems, behind x86-64, IBM POWER, and SPARC. Intel released its newest Itanium, codenamed Montvale, in November 2007.^[1]

Architecture

Intel has extensively documented the Itanium instruction set and microarchitecture,^[24] and the technical press has provided overviews.^[25][8] The architecture has been renamed several times during its history. HP called it PA-WideWord. Intel later called it IA-64, then Itanium Processor Architecture (IPA),^[26] before settling on Intel Itanium Architecture, but it is still widely referred to as IA-64. It is a 64-bit register-rich explicitly-parallel architecture. The base data word is 64 bits, byte-addressable. The logical address space is 2⁶⁴ bytes. The architecture implements predication, speculation, and branch prediction. It uses a hardware register renaming mechanism rather than simple register windowing for parameter passing. The same mechanism is also used to permit parallel execution of loops. Speculation, prediction, predication, and renaming are under control of the compiler: each instruction word includes extra bits for this. This approach is the distinguishing characteristic of the architecture.

The architecture implements 128 integer registers, 128 floating point registers, 64 one-bit predicates, and eight branch registers. The floating point registers are 82 bits long to preserve precision for intermediate results.

Competition
The Itanium 2 competes in the enterprise server market. Itanium's major competitors include Sun Microsystems' UltraSPARC IV+, Fujitsu's SPARC64, IBM's POWER6, AMD's Opteron, and Intel's own Xeon servers.
Throughout its history, Itanium has had the best floating point performance relative to fixed-point performance of any general-purpose microprocessor. This capability is useful in HPC systems but is not needed for most enterprise server workloads.

x86 = x86-32 = IA-32 = i386 architecture

IA-32 (Intel Architecture, 32 bit), often generically called x86 or x86-32, is the instruction set architecture of Intel's most commercially successful microprocessors. It is an 32-bit extension, first implemented in the Intel 80386, of the earlier 16-bit Intel 8086, 80186 and 80286 processors and the common denominator for all subsequent x86 designs. This architecture defines the instruction set for the family of microprocessors installed in the vast majority of personal computers in the world.

The longevity is partially due to full backwards compatibility and the architecture has also recently been extended to 64-bits, without breaking compatibility. This is now called Intel 64 by Intel (generically called x86-64) and is basically unrelated to the 64-bit IA-64 architecture implemented in Intel's Itanium series.

The IA-32 instruction set is usually described as a CISC (Complex Instruction Set Computer) architecture, though such classifications have become less meaningful with advances in microprocessor design. Modern x86 architectures such as K7, NetBurst, and newer, are often referred to as post-RISC processors.

1 History 2 Succeeding architectures 2.1 IA-64 2.2 AMD64 2.3 Intel 64 3 See also

History
The IA-32 instruction set was introduced in the Intel 80386 microprocessor in 1985 and remains the basis of most PC microprocessors over twenty years later. Even though the instruction set has remained intact, the successive generations of microprocessors that run it have become much faster. Within various programming language directives, IA-32 is still sometimes referred to as the "i386" architecture.

Intel was the inventor and is the biggest supplier of IA-32 processors, but it is not the only supplier. The second biggest supplier is AMD. There are other suppliers, but their volumes are small. As of 2007, Intel is moving to x86-64, but still produces IA-32 processors such as Celeron M for laptops. VIA Technologies continues to produce the VIA C3/C7 family of "pure" IA-32 devices, and AMD still produces the Geode line and mobile IA-32 processors. For a time Transmeta produced IA-32 processors.

The IA-32 architecture was expanded by AMD in 2003 to natively support 64 bits, creating a new derivative x86-64 architecture. The first family of processors to support this architecture, which AMD calls AMD64, was the AMD K8 family of processors. This was the first time any company other than Intel made significant additions to the IA-32 architecture. Intel was forced to follow suit, introducing modified NetBurst family processors, initially referred to as "IA-32e" or "EM64T" (Enhanced Memory 64 bit Technology) and now called Intel 64 and almost identical to AMD64. x86-64 is backwards compatible with 32-bit code without any performance loss. For example, The Developers Manuals available from Intel on the IA-32 architecture refer to IA-32 and IA-32e in tandem.

Note
The AMD Opteron is the first eighth-generation x86 processor (K8 core), and the first of AMD's AMD64 (x86-64) processors, released April 22, 2003. It is intended to compete in the server market, particularly in the same segment as the Intel Xeon processor.
The Opteron's main advantage is the ability to run existing 32-bit applications without speed penalties, as well as the 64-bit applications that can directly access more than 4 GB of RAM (the physical limit of a 32-bit system).

x86-64 or AMD64

x86-64 is a 64-bit superset of the x86 instruction set architecture. Because the x86-64 instruction set is a superset of the x86 instruction set, all instructions in the x86 instruction set can be executed by central processing units (CPUs) that implement the x86-64 instruction set; therefore those CPUs can natively run programs that run on x86 processors from Intel, Advanced Micro Devices (AMD), and other vendors.
x86-64 was designed by AMD, who have since renamed it AMD64. It has been cloned by Intel under the name Intel 64 (formerly known as EM64T among other names).^[1] This leads to the common use of the names x86-64 or x64 as more vendor-neutral terms to collectively refer to the two nearly identical implementations.

x86-64 should not be confused with the Intel Itanium architecture, also known as IA-64, which is not compatible on the native instruction set level with the x86 or x86-64 architecture.

Linux x86-64

See also: List of 64-bit Linux distributions

Linux was the first operating system kernel to run the x86-64 architecture in long mode, starting with the 2.4 version prior to the physical hardware's availability.

Linux also provides backward compatibility for running 32-bit executables. This permits programs to be recompiled into long mode while retaining the use of 32-bit programs. Several Linux distributions currently ship with x86-64-native kernels and userlands. Some, such as SUSE, Mandriva and Debian GNU/Linux package both 32-bit and 64-bit systems on a single DVD-ROM image to allow automatic selection of the best software during installation.
Other distributions, such as Ubuntu, are available in a version compiled for 32-bit and one compiled for x86-64 architecture.

64-bit Linux allows up to 2⁴⁷ bytes (128 TiB) of address space for individual processes, and can address approximately 2⁴⁶ (64 TiB) of physical memory, subject to processor and system limitations.

---------------------------------------------

• 1 AMD64
  • 1.1 History of AMD64
  • 1.2 Architectural features
  • 1.3 Virtual address space details
  • 1.4 Operating modes
    • 1.4.1 Operating mode explanation
  • 1.5 Implementations
• 2 Intel 64
  • 2.1 History of Intel 64
  • 2.2 Implementations
• 3 Differences between AMD64 and Intel 64
  • 3.1 Recent implementations
  • 3.2 Older implementations
• 4 Operating system support
  • 4.1 Windows
  • 4.2 Linux
  • 4.3 Mac OS X
  • 4.4 BSD
    • 4.4.1 FreeBSD
    • 4.4.2 NetBSD
    • 4.4.3 OpenBSD
  • 4.5 MenuetOS
  • 4.6 Solaris
  • 4.7 DOS
• 5 Industry naming conventions