Intel Virtualization info

Naming conventions used by Intel
VT by itself generally refers to a technology, more specifically:

Processor technology:
VT-x for x86
VT-i for Itanium

Chipset technology:
VT-d Virtualization Technology for Directed I/O

softwarecommunity.intel.com

VT supporting processors:
Intel processor numbers
Intel Pentium D
intel Pentium D info

Intel desktop extreme series MoBo

AMD or Intel processors?

List of AMD microprocessors

List of Intel microprocessors

64 bit processor architectures

The original IA-32 instruction set has been evolved over time with the addition of the multimedia instruction updates. Many new architectures, including 64-bit ones, have since succeeded IA-32.
However, the ultimate evolution of IA-32 was when it was extended again to 64-bits, but of course at that point it cannot be called IA-32 anymore; the 64-bit extension is called x86-64. It could not be called IA-64 as Intel had already used this label for the Itanium design (a design which is not really an evolution of the IA-32 architecture). AMD's AMD64 was the first x86-64 instruction set designed. Later, Intel followed by imitating AMD's design with what they call Intel 64 (formerly IA-32e and EM64T).

IA-64

Main article: IA64

Intel's IA-64 architecture is not directly compatible with the IA-32 instruction set, despite having a similar name. It completely discards all IA-32 instructions, and starts from scratch with a completely different instruction set as well as using a VLIW design instead of out-of-order execution. IA-64 is the architecture used by the Itanium line of processors. Itanium initially had hardware-support for IA-32, but it was very slow. Intel shifted to the use of a software emulator instead. The nomenclature "IA-64" means "Intel Architecture, 64-bit", but the connection with IA-32 is only in the name.
Further improvements are:

• Sixteen times the number of general purpose registers (now 128)
• Sixteen times the number of floating point registers (now 128)
• Register rotation mechanism to keep values in registers over function calls

AMD64

Main article: x86-64

AMD's AMD64 instruction set, initially called x86-64, is largely built on top of IA-32, and thus maintains the x86 family heritage, despite having a different name. While extending the instruction set, AMD took the opportunity to clean up some of the odd behavior of this instruction set that has existed since its earliest 16-bit days, while the processor is operating in 64-bit mode.
Further improvements are:

• Two times the number of general purpose registers (now 16)
• Two times the number of SSE registers (now 16)
• The general purpose registers are now truly general-purpose registers and are no longer restricted.
• Most of the functionality of the segment registers has been
  deprecated, since their usage has steadily declined even during the
  IA-32 days.

Intel 64

Main article: x86-64#Intel_64

By February 2004, Intel announced the Intel 64 instruction set, formerly known as Yamhill. It was derived from AMD's AMD64.
Intel 64 is generally compatible with code written for the AMD64, though it lacks some AMD64 features. Intel started using the set starting with the Xeon Nocona core in late 2004, introducing it to the desktop market with the Pentium 4 E0 revision in early 2005.

Intel Itanium

Itanium 2 processor, 2003
Produced:	From mid 2001 to present
Max CPU clock:	733 MHz to 1.66 GHz
FSB speeds:	300 MHz to 667 MHz
Instruction set:	Itanium
Cores:	1 or 2
Socket:	PAC611
Core names: McKinley Madison Hondo Deerfield Montecito Montvale

Itanium is the brand name for 64-bit Intel microprocessors that implement the Intel Itanium architecture (formerly called IA-64). Intel has released two processor families using the brand: the original Itanium and the Itanium 2. Starting November 1, 2007, new members of the second family are again called Itanium. The processors are marketed for use in enterprise servers and high-performance computing systems. The architecture originated at Hewlett-Packard (HP) and was later developed by HP and Intel together.

Itanium's architecture differs dramatically from the x86 architectures (and the x86-64 extensions) used in other Intel processors. The architecture is based on explicit instruction-level parallelism, with the compiler making the decisions about which instructions to execute in parallel. This approach allows the processor to execute up to six instructions per clock cycle. By contrast with other superscalar architectures, Itanium does not have elaborate hardware to keep track of instruction dependencies during parallel execution - the compiler must keep track of these at build time instead.
After a protracted development process, the first Itanium was released in 2001, and more powerful Itanium processors have been released periodically. HP produces most Itanium-based systems, but several other manufacturers have also developed systems based on Itanium. As of 2007, Itanium is the fourth-most deployed microprocessor architecture for enterprise-class systems, behind x86-64, IBM POWER, and SPARC. Intel released its newest Itanium, codenamed Montvale, in November 2007.^[1]

• 1 History
  • 1.1 Development: 1989–2001
  • 1.2 Original Itanium processor: 2001–02
  • 1.3 Itanium 2 processors: 2002–present

Timeline

• 1989:

  • HP begins investigating EPIC^[4]
  
  
  
• 1994:

  • June: HP and Intel announce partnership^[45]
  
  
  
• 1995:

  • September: HP, Novell, and SCO announce plans for a "high volume UNIX operating system" to deliver "64-bit networked computing on the HP/Intel architecture"^[46]
  
  
  
• 1996:

  • October: Compaq announces it will use IA-64^[47]
  
  
  
• 1997:

  • June: IDC predicts IA-64 systems sales will reach $38bn/yr by 2001^[2]
  • October: Dell announces it will use IA-64^[48]
  • December: Intel and Sun announce joint effort to port Solaris to IA-64^[6]
  
  
  
• 1998:

  • March: SCO admits HP/SCO Unix alliance is now dead
  • June: IDC predicts IA-64 systems sales will reach $30bn/yr by 2001^[2]
  • June: Intel announces Merced will be delayed, from second half of 1999 to first half of 2000^[49]
  • September: IBM announces it will build Merced-based machines^[50]
  • October: Project Monterey is formed to create a common UNIX for IA-64
  
  
  
• 1999:

  • February: Project Trillian is formed to port Linux to IA-64
  • August: IDC predicts IA-64 systems sales will reach $25bn/yr by 2002^[2]
  • October: Intel Announces the Itanium name
  • October: the term Itanic is first used
  
  
  
• 2000:

  • February: Project Trillian delivers source code
  • June: IDC predicts Itanium systems sales will reach $25bn/yr by 2003^[2]
  • July: Sun and Intel drop Solaris-on-Itanium plans^[51]
  • August: AMD releases specification for x86-64,
    a set of 64-bit extensions to Intel's own x86 architecture intended to
    compete with IA-64. It will eventually market this under the name
    "AMD64"
  
  
  
• 2001:

  • June: IDC predicts Itanium systems sales will reach $15bn/yr by 2004^[2]
  • June: Project Monterey dies
  • July: Itanium is released
  • October: IDC predicts Itanium systems sales will reach $12bn/yr by the end of 2004^[2]
  • November: IBM's 320-processor Titan NOW Cluster at National Center for Supercomputing Applications is listed on the TOP500 list at position #34^[15]
  • November: Compaq delays Itanium Product release due to problems with processor^[52]
  • December: Gelato is formed
  
  
  
• 2002:

  • March: IDC predicts Itanium systems sales will reach $5bn/yr by end 2004^[2]
  • June:Itanium 2 is released
  
  
  
• 2003:

  • April: IDC predicts Itanium systems sales will reach $9bn/yr by end 2007^[2]
  • April: AMD releases Opteron, the first processor with x86-64 extensions
  • June: Intel releases the "Madison" Itanium 2
  
  
  
• 2004:

  • February: Intel announces it has been working on its own x86-64
    implementation (which it will eventually market under the name "Intel
    64")
  • June: Intel releases its first processor with x86-64 extensions, a Xeon
    processor codenamed "Nocona"
  • June: Thunder, a system at LLNL with 4096 Itanium 2 processors, is listed on the TOP500 list at position #2^[53]
  • November: Columbia, an SGIAltix 3700 with 10160 Itanium 2 processors at NASA Ames Research Center, is listed on the TOP500 list at position #2.^[54]
  • December: Itanium system sales for 2004 reach $1.4bn
  
  
  
• 2005:

  • January: HP ports OpenVMS to Itanium^[55]
  • February: IBM server design drops Itanium support^[56][32]
  • June: An Itanium 2 sets a record SPECfp2000 result of 2,801^[57] in a Hitachi, Ltd.Computing blade.
  • September: Itanium Solutions Alliance is formed^[58]
  • September: Dell exits the Itanium business^[59]
  • October: Itanium server sales reach $619M/quarter in the third quarter.
  • October: Intel announces one-year delays for Montecito, Montvale, and Tukwila^[19]
  
  
  
• 2006:

  • January: Itanium Solutions Alliance announces a $10bn collective investment in Itanium by 2010
  • February: IDC predicts Itanium systems sales will reach $6.6bn/yr by 2009^[3][60][61]
  • June: Intel releases the dual-core "Montecito" Itanium 2^[62]
  
  
  
• 2007:
  
  • October: Intel releases the "Montvale" Itanium 2
  • November: Intel renames the family back to Itanium.
  
  

IA-64 = Intel Itanium Architecture

Itanium is the brand name for 64-bit Intel microprocessors that implement the Intel Itanium architecture (formerly called IA-64). Intel has released two processor families using the brand: the original Itanium and the Itanium 2. Starting November 1, 2007, new members of the second family are again called Itanium. The processors are marketed for use in enterprise servers and high-performance computing systems. The architecture originated at Hewlett-Packard (HP) and was later developed by HP and Intel together.

Itanium's architecture differs dramatically from the x86 architectures (and the x86-64 extensions) used in other Intel processors. The architecture is based on explicit instruction-level parallelism, with the compiler making the decisions about which instructions to execute in parallel. This approach allows the processor to execute up to six instructions per clock cycle. By contrast with other superscalar architectures, Itanium does not have elaborate hardware to keep track of instruction dependencies during parallel execution - the compiler must keep track of these at build time instead.

After a protracted development process, the first Itanium was released in 2001, and more powerful Itanium processors have been released periodically. HP produces most Itanium-based systems, but several other manufacturers have also developed systems based on Itanium. As of 2007, Itanium is the fourth-most deployed microprocessor architecture for enterprise-class systems, behind x86-64, IBM POWER, and SPARC. Intel released its newest Itanium, codenamed Montvale, in November 2007.^[1]

Architecture

Intel has extensively documented the Itanium instruction set and microarchitecture,^[24] and the technical press has provided overviews.^[25][8] The architecture has been renamed several times during its history. HP called it PA-WideWord. Intel later called it IA-64, then Itanium Processor Architecture (IPA),^[26] before settling on Intel Itanium Architecture, but it is still widely referred to as IA-64. It is a 64-bit register-rich explicitly-parallel architecture. The base data word is 64 bits, byte-addressable. The logical address space is 2⁶⁴ bytes. The architecture implements predication, speculation, and branch prediction. It uses a hardware register renaming mechanism rather than simple register windowing for parameter passing. The same mechanism is also used to permit parallel execution of loops. Speculation, prediction, predication, and renaming are under control of the compiler: each instruction word includes extra bits for this. This approach is the distinguishing characteristic of the architecture.

The architecture implements 128 integer registers, 128 floating point registers, 64 one-bit predicates, and eight branch registers. The floating point registers are 82 bits long to preserve precision for intermediate results.

Competition
The Itanium 2 competes in the enterprise server market. Itanium's major competitors include Sun Microsystems' UltraSPARC IV+, Fujitsu's SPARC64, IBM's POWER6, AMD's Opteron, and Intel's own Xeon servers.
Throughout its history, Itanium has had the best floating point performance relative to fixed-point performance of any general-purpose microprocessor. This capability is useful in HPC systems but is not needed for most enterprise server workloads.

x86 = x86-32 = IA-32 = i386 architecture

IA-32 (Intel Architecture, 32 bit), often generically called x86 or x86-32, is the instruction set architecture of Intel's most commercially successful microprocessors. It is an 32-bit extension, first implemented in the Intel 80386, of the earlier 16-bit Intel 8086, 80186 and 80286 processors and the common denominator for all subsequent x86 designs. This architecture defines the instruction set for the family of microprocessors installed in the vast majority of personal computers in the world.

The longevity is partially due to full backwards compatibility and the architecture has also recently been extended to 64-bits, without breaking compatibility. This is now called Intel 64 by Intel (generically called x86-64) and is basically unrelated to the 64-bit IA-64 architecture implemented in Intel's Itanium series.

The IA-32 instruction set is usually described as a CISC (Complex Instruction Set Computer) architecture, though such classifications have become less meaningful with advances in microprocessor design. Modern x86 architectures such as K7, NetBurst, and newer, are often referred to as post-RISC processors.

1 History 2 Succeeding architectures 2.1 IA-64 2.2 AMD64 2.3 Intel 64 3 See also

History
The IA-32 instruction set was introduced in the Intel 80386 microprocessor in 1985 and remains the basis of most PC microprocessors over twenty years later. Even though the instruction set has remained intact, the successive generations of microprocessors that run it have become much faster. Within various programming language directives, IA-32 is still sometimes referred to as the "i386" architecture.

Intel was the inventor and is the biggest supplier of IA-32 processors, but it is not the only supplier. The second biggest supplier is AMD. There are other suppliers, but their volumes are small. As of 2007, Intel is moving to x86-64, but still produces IA-32 processors such as Celeron M for laptops. VIA Technologies continues to produce the VIA C3/C7 family of "pure" IA-32 devices, and AMD still produces the Geode line and mobile IA-32 processors. For a time Transmeta produced IA-32 processors.

The IA-32 architecture was expanded by AMD in 2003 to natively support 64 bits, creating a new derivative x86-64 architecture. The first family of processors to support this architecture, which AMD calls AMD64, was the AMD K8 family of processors. This was the first time any company other than Intel made significant additions to the IA-32 architecture. Intel was forced to follow suit, introducing modified NetBurst family processors, initially referred to as "IA-32e" or "EM64T" (Enhanced Memory 64 bit Technology) and now called Intel 64 and almost identical to AMD64. x86-64 is backwards compatible with 32-bit code without any performance loss. For example, The Developers Manuals available from Intel on the IA-32 architecture refer to IA-32 and IA-32e in tandem.

Note
The AMD Opteron is the first eighth-generation x86 processor (K8 core), and the first of AMD's AMD64 (x86-64) processors, released April 22, 2003. It is intended to compete in the server market, particularly in the same segment as the Intel Xeon processor.
The Opteron's main advantage is the ability to run existing 32-bit applications without speed penalties, as well as the 64-bit applications that can directly access more than 4 GB of RAM (the physical limit of a 32-bit system).

Intel Celeron

Celeron (Coppermine 128) / 600 MHz
Producción:	Abril de 1998
Velocidad de CPU:	266 MHz a 3.6 GHz
Velocidad de FSB:	66 MHz a 800 MHz
Procesos: (Longitud de canal del MOSFET)	0.25 µm a 0.065 µm
Conjunto de instrucciones:	x86, EM64T
Microarquitectura:	P6, NetBurst, Intel Core
Sockets: Slot 1 Socket 370 Socket 478 LGA 775 Socket M
Cores: Covington Mendocino Coppermine-128 Tualatin-256 Willamette-128 Northwood-128 Prescott-256

Al igual que con el Pentium II y el Pentium III, junto al Pentium 4 se comercializa una versión para equipos de bajo presupuesto (Celeron), y una orientada a servidores de gama alta (Xeon).
Celeron es el nombre que lleva la línea de procesadores de bajo costo de Intel. El objetivo era poder, mediante esta segunda marca, penetrar en los mercados que no podían acceder a los procesadores Pentium, de mayor rendimiento pero también más caros.
Los procesadores Celeron pueden realizar las mismas funciones básicas que otros procesadores, pero su rendimiento es inferior cuando se compara a otros procesadores más costosos. Por ejemplo, los Celeron usualmente tienen menos memoria caché, o tienen algunas funcionalidades avanzadas desactivadas. Estas diferencias tienen un impacto variable en el rendimiento general del procesador. Aunque muchos procesadores Celeron pueden trabajar prácticamente al mismo nivel de otros procesadores, algunas aplicaciones avanzadas (juegos, edición de video, programas de ingeniería, etc.) tal vez no funcionen igual en un Celeron.

El primer Celeron fue lanzado en agosto de 1998, y estaba basado en el Pentium II. Posteriormente, salieron nuevos modelos basados en las tecnologías Pentium III, Pentium 4 e Intel Core 2 Duo. El más reciente esta basado en el Core 2 Duo (Allendale).
En el momento en el que se introdujo el Celeron, preocupaba a Intel la ya mencionada pérdida de cuota de mercado en los sectores de bajo poder adquisitivo (low-end). Para evitar competencia, dejaron de lado el estandarizado Socket 7* y lo reemplazaron por el Slot 1*. Las demás marcas (AMD, Cyrix) tuvieron dificultades de índole técnica y legal para fabricar microprocesadores que se adapten a este conector.
Los procesadores Celeron se dividen en tres grandes clases, las cuales se dividen a su vez en varias subclases. Estas tres clases son:

• P6*: Basada en los procesadores Pentium II y Pentium III
• Netburst*: Basada en los procesadores Pentium 4
• Intel Core* Basados en un núcleo de los procesadores Intel Core 2 Duo

• 1 Procesadores P6
  
  • 1.1 Covington
  • 1.2 Mendocino
  • 1.3 Coppermine-128
  • 1.4 Tualatin
  • 1.5 Banias-512
  • 1.6 Shelton (también conocida como Banias-0)
  • 1.7 Celeron M
  
  
• 2 Procesadores Netburst
  
  • 2.1 Willamette-128
  • 2.2 Northwood-128
  • 2.3 Celeron D (Prescott 256 & Cedar Mill 512)
  
  
• 3 Procesadores Intel Core
  
  • 3.1 Celeron D (Conroe-L)

Intel Core 2 Duo

Conroe:

Intel Core 2 Duo E6600 "Conroe"
Producción:	2006 -
Velocidad de CPU:	1.60 GHz a 3.33 GHz
Velocidad de FSB:	667 MT/s a 1333 MT/s
Procesos: (Longitud de canal del MOSFET)	0.065 µm a 0.040 µm
Conjunto de instrucciones:	EM64T
Microarquitectura:	Intel Core Microarchitecture
Socket:	LGA775
Número de Cores:	1, 2, o 4 (2x2)
Cores: Conroe-L Allendale Conroe Merom Kentsfield Yorkfield Wolfdale

El microprocesador Core 2 Duo de Intel es la continuación de los Pentium D y Core Duo. Su distribución comenzó el 27 de julio de 2006.

Características
El Core 2 Duo es un procesador con un pipeline de 14 etapas lo que le permite escalar más en frecuencia que su antecesor directo: el Core 1, que tenía 12 etapas al igual que el Athlon 64. Tiene, además, un motor de ejecución ancho con tres ALUs, cuatro FPUs, y tres unidades de SSE de 128 bits. Estas dos características hacen que sea el procesador x86 que más instrucciones por ciclo puede lograr.
Entre otras características destacan arquitectura de 64 bits EM64T (no disponible en su predecesor Core Duo), Virtualization Technology, LaGrande Technology, Intel Enhanced SpeedStep Technology, Active Management Technology (iAMT2), MMX, SSE, SSE2, SSE3, SSSE3, y XD bit.
Existen versiones de sobremesa y para portátiles, a diferencia de la división existente desde 2003 entre Pentium M para portátiles y Pentium 4 para ordenadores de sobremesa, unificando el nombre de Core 2 Duo para todas los procesadores de gama media dejando además el nombre Pentium, utilizado desde 1993, para los procesadores de gama baja (y menor rendimiento) basados en la arquitectura de Core 2 con un caché reducido llamado Pentium Dual Core, quienes a su vez vienen a reemplazar a la familia Celeron en este rol.

Una llamativa característica de esta familia es su particular facilidad para aplicar overclock, llegando muchos de estos procesadores a ganancias superiores al 50% en su frecuencia de trabajo
Otra diferencia es la forma como trabajan sus núcleos: en el dual core sus núcleos trabajan de manera alterna, mientras que en el core 2 dúo sus núcleos trabajan de manera simultanea dando un mayor rendimiento.

Durante un tiempo se dijo que el core 2 duo poseía 4 núcleos cosa que es errónea. Sólo posee 2 pues es un tipo especial de dual core.

Intel Core Duo

Producción:	2006 -
	Velocidad de CPU:	1.06 GHz a 2.33 GHz
	Velocidad de FSB:	533 MT/s a 667 MT/s
	Procesos: (Longitud de canal del MOSFET)	0.065 µm
	Conjunto de instrucciones:	x86
	Microarquitectura:	Intel P6
	Socket:	Socket M
	Nombre de core:	Yonah

Intel Core Duo es un microprocesador lanzado en enero del 2006 por Intel con dos núcleos de ejecución, optimizado para las aplicaciones de subprocesos múltiples y para multitarea.

Puede ejecutar varias aplicaciones exigentes simultáneamente, como juegos con gráficos potentes o programas que requieran muchos cálculos, al mismo tiempo que puede descargar música o analizar su PC con su antivirus en segundo plano, por ejemplo.
Cabe decir que un modelo anterior a Core 2 Duo y posterior a los Pentium D es el 'Dual Core Inside' que es un Core Duo pero le fue puesto ese nombre (Dual Core inside). Es un procesador con dos núcleos de ejecución, que al igual que los Pentium D se diferencia de los Core 2 Duo por que su caché es de sólo 1 mb con un bus frontal de 800 Mhz, mayor al Core Duo. Estos procesadores están orientados para su uso en equipos portátiles aunque de igual forma hay versiones para computadoras de escritorio.
Este microprocesador implementa 2Mb de caché compartida para ambos núcleos más un bus frontal de 667Mhz; además implementa un nuevo juego de instrucciones para multimedia (SSE3) y mejoras para las SSE y SSE2.
Sin embargo, el desempeño con enteros es ligeramente inferior debido a su caché con mayor latencia. También incluye soporte para la tecnología Bit NX.
Intel Core Duo es el primer microprocesador de Intel usado en las computadoras Apple Macintosh.
Existe también una versión con sólo un nucleo denominada Core Solo

Especificaciones técnicas
El Core Duo contiene 151 millones de transistores, incluyendo la memoria caché de 2Mb. El núcleo de ejecución del procesador contiene un pipeline de 12 etapas con velocidades previstas de ejecución entre 2.33 y 2.50 GHz. La comunicación entre la caché L2 y los dos núcleos de ejecución es controlada por un módulo de bus árbitro que elimina el tráfico de coherencia a través del bus frontal (FSB), con el costo de elevar la latencia de la comunicación de núcleo-a-L2 de 10 ciclos de reloj (en el Pentium M) a 14 ciclos de reloj. El incremento de la frecuencia de reloj contrapesa el impacto del incremento en la latencia.
Las nuevas características de administración de energía incluyen control mejorado de temperatura, así como escalado independiente de energía entre los 2 núcleos, lo que resulta en un manejo de energía mucho más eficiente que los diseños anteriores.
Los 2 núcleos se comunican con el procesador a través de un bus frontal (FSB) de 667MHz.

Intel Pentium Dual Core

Producción:	2006 -
Velocidad de CPU:	1.46 GHz a 2.20 GHz
Velocidad de FSB:	533 MT/s a 800 MT/s
Procesos: (Longitud de canal del MOSFET)	0.065 µm
Conjunto de instrucciones:	x86
Socket:	LGA775

El procesador Pentium Dual Core es parte de la familia de microprocesadores creados por la empresa Intel, que utilizan la tecnologia de 'Doble Nucleo', y es el que salio después de la serie de procesadores Pentium D y despues de los Core 2 Duo.
Fue diseñado para trabajar en entornos moviles (Laptops) y en equipos de escritorio (Desktops), permitiendo la ejecución de aplicaciones múltiples, a un bajo costo, un bajo consumo energético y sin sacrificar el desempeño de la computadora. Este procesador es un Core 2 Duo, pero en su lanzamiento se le puso ese nombre (Pentium Dual Core). Tiene la tecnologia de Doble Nucleo de Procesamiento, pero esta implementación se realiza de manera virtual.
Posee una memoria de cache de 2° nivel de 1 MB (L2 Cache), un bus frontal de 533 mhz para equipos portatiles y 800 mhz para desktops. Tiene la posibilidad de trabajar a 64 bits.

Aclaratoria
Error respecto al Intel Pentium D:

"Se suelen confundir Pentium D con Pentium Dual Core, mucha gente cree que los Pentium D son Dual Core, cabe destacar, que los Pentium D tiene 2 nucleos virtuales usando la tecnologia HyperThreading, en cambio los Pentium Dual Core como ya se dijo usa la tecnologia Core 2 Duo."

La rectificación (de Tom's Hardware):

Pentium D = un único procesador con un único núcleo trabajando virtualmente como dos procesadores (un socket) Pentium Dual Core = un único procesador con dos núcleos trabajando como dos procesadores (un socket) Core 2 Duo = un único procesador con dos núcleos trabajando como dos procesadores superior en rendimiento y costo al Pentium Dual Core (dos Sockets)

Intel Xeon

Intel Xeon Clovertown Quad Core 2X (8 Cores) Review

Xeon es una familia de microprocesadores Intel para servidores PC y Macintosh. El primer procesador Xeon apareció en 1998 con el nombre Pentium II Xeon.
El Pentium II Xeon utilizaba tanto el chipset 440GX como el 450NX. En el año 2000, el Pentium II Xeon fue reemplazado por el Pentium III Xeon.
En 2001, el Pentium III Xeon se reemplazó por el procesador Intel Xeon. El Xeon está basado en la arquitectura NetBurst de Intel y es similar a la CPU Pentium 4.
El último miembro añadido a la familia Xeon es el procesador Xeon MP, lanzado en 2002, que combinaba la tecnología Hyper-Threading con NetBurst. Sus chipsets utilizan el socket 603 y tiene versiones GC-LE (2 procesadores, 16 Gb de memoria direccionable) y GC-HE (4 procesadores o más, 64 Gb direccionables), todos usando un bus de 400 megaherzios.

Como la familia x86/IA-32 estándar de Intel de procesadores PC de escritorio, la línea de procesadores Xeon era de 32 bits, surgiendo luego versiones basadas en tecnología AMD 64 de 64 bits como es el Xeon Nocona. Y posteriormente la version de procesadores de escritorio con esta tecnología, los EM64T.

El 9 de mayo de 2004, Intel anunció que los futuros procesadores Xeon estarían basados en la arquitectura Pentium M de la compañía. Curiosamente, el Pentium M está fuertemente basado en la arquitectura del Pentium III, por lo que el "nuevo" Xeon puede ser más parecido al Pentium III Xeon que a los Xeon basados en NetBurst.
El 26 de junio de 2006, Intel anunció la nueva generación: Xeon Dual Core Xeon con tecnología de doble núcleo. Intel afirma que este nuevo procesador brinda un 80% más de rendimiento por vatio y 60% más rápido que la competencia. Además la nueva generación ofrece más del doble de rendimiento que la generación anterior de servidores basados en el procesador Intel Xeon; capaz de ejecutar aplicaciones de 32 y 64 bits.
Este procesador es altamente preferido por los jugadores de videojuegos de computadoras. Intel fue altamente criticado por esto. Este último procesador sustituyó al veterano y caluroso PowerPC en las estaciones de trabajo MacPro y los servidores XServe de Apple cuando se hizo la transición de Power PC a x86 y mejorando su eficacia con la tecnología de arranque EFI.

Pentium 4 types (Codes)

List of the current revisions of the Intel Pentium 4 processor, and their differentiating characteristics.

Pentium 4 Processors, Designations, and Characteristics

Public Desig nation	Core (Intel Code name)	CPU Frequency	Frontside Bus Frequency / Theoretical Bandwidth	Cache	Additional Features
(ori- ginal rel. revi- sion)	Willamette	1.3 GHz - 2.0 GHz	100 MHz / 3.2 GB/s	8 KiB L1 data + 12 KiB L1 instruction / 256 KiB L2	N/A
P4A	Northwood	1.6 GHz - 3.0 GHz	100 MHz / 3.2 GB/s	8 KiB L1 data + 12 KiB L1 instruction / 512 KiB L2	Improved branch prediction and other microcodes tweaks; these are carried over into subsequent revisions
P4B	Northwood	2.0 GHz - 3.06 GHz	133 MHz / 4.2 GB/s	8 KiB L1 data + 12 KiB L1 instruction / 512 KiB L2	No change from P4A, except for Hyper threading in the 3.06 GHz model
P4C	Northwood	2.4 GHz - 3.4+ GHz	200 MHz / 6.4 GB/s	8 KiB L1 data + 12 KiB L1 instruction / 512 KiB L2	Hypert hreading
P4E	Prescott	2.8 GHz - 3.8+ GHz	200 MHz / 6.4 GB/s	16 KiB L1 data + 12 KiB L1 instruction / 1 MiB L2	Hypert hreading, longer pipeline, SSE3 instruc tions
P4A*	Prescott	2.4 and 2.8 GHz	133 MHz / 4.2 GB/s	16 KiB L1 data + 12 KiB L1 instruction / 1 MiB L2	No Hyper threading, longer pipeline, SSE3 instructions
Extre me Edition	Gallatin	3.2 GHz - 3.4 GHz	200 MHz / 6.4 GB/s	8 KiB L1 data + 12 KiB L1 instruction / 512 KiB L2 / 2 MiB L3	Hypert hreading, addition of on-die L3 cache
P4F	Prescott	3.2 GHz - 3.8 GHz	200 MHz / 6.4 GB/s	16 KiB L1 data + 12 KiB L1 instruction / 1 MiB L2	Support of EM64T and eXecute Disable bit (equivalent of AMD's No eXecute bit)
6xx series	Prescott 2MB**	2.8 GHz - 3.6 GHz	200 MHz / 6.4 GB/s	16 KiB L1 data + 12 KiB L1 instruction Per Core / Shared 2 MiB L2	Larger L2 cache, support of EM64T and SpeedStep
Pentium D#	Smithfield	2.8 GHz - 3.2 GHz	200 MHz / 6.4 GB/s	16 KiB L1 data + 12 KiB L1 instruction Per Core / Shared 2 MiB L2	Support of EM64T and eXecute Disable bit (equivalent of AMD's No eXecute bit) Dual Core Processor
Notes: Pentium 4 processors use a frontside bus that transfers data four times per cycle * - in the case of the budget Prescott processor line, Intel duplicated the "P4A" designation which retailers are supposed to use to identify the processor to buyers; no reason was given for this decision ** - the official core name for the 600-series, though the core is sometimes called by its Xeon equivalent, Irwindale in order to distinguish between it and the initial Prescott. # - the Pentium D consists of 2 Prescott cores on a single die.

x86 virtualization

x86 virtualization is the method by which x86-based "guest" operating systems are run under another "host" x86 operating system, with little or no modification of the guest OS. The x86 processor architecture did not originally meet the Popek and Goldberg virtualization requirements. As a result, it was very difficult to implement a general virtual machine on an x86 processor. In 2005 and 2006, extensions to their respective x86 architectures by Intel and AMD resolved this and other virtualization difficulties.

Hardware support
Intel and AMD have independently developed virtualization extensions to the x86 architecture. They are not directly compatible with each other, but serve largely the same functions. Either will allow a virtual machine hypervisor to run an unmodified guest operating system without incurring significant emulation performance penalties.

AMD virtualization (AMD-V)
AMD's virtualization extensions to the 64-bit x86 architecture is named AMD Virtualization, abbreviated AMD-V. It is still referred to as "Pacifica", the AMD internal project code name.AMD-V is present in AMD Athlon 64 with family "F" and "G" on socket AM2 not 939, Athlon 64 X2 with family "F" and "G", Turion 64 X2, Opteron 2nd generation^[1] and 3rd generation^[2], Phenom, and all newer processors.

AMD has published a specification for a technology named IO Memory Management Unit (IOMMU) to AMD-V. This provides a way of configuring interrupt delivery to individual virtual machines and an IO memory translation unit for preventing a virtual machine from using DMA to break isolation. The IOMMU also plays an important role in advanced operating systems (absent virtualization) and the AMD Torrenza architecture.

Intel VT (IVT)
Intel's virtualization extension for 32-bit and 64-bit x86 architecture is named IVT (short for Intel Virtualization Technology), and is sometimes referred to by the development code name "Vanderpool". The 32-bit or IA-32 IVT extensions are referred to as VT-x.^[3] Intel has also published specifications for IVT for the IA-64 (Itanium) processors which are referred to as VT-i;^[3] formerly the IA-64 virtualization was code-named "Silvervale".Intel will add EPT (Extended Page Tables) to the VT-x architecture. See link: http://www.intel.com/technology/itj/2006/v10i3/1-hardware/8-virtualization-future.htm

Intel VT was officially launched at the Intel Developer Forum Spring 2005. It is available on certain Pentium 4 6x1 and 6x2 models,^[4] Pentium D 9x0^[5], Xeon 3xxx/5xxx/7xxx, Core Duo^[6] (excluding the T2300E and T2x50 models) and Core 2 Duo^[7] processors (excluding the T52x0, T5300, T54x0, T5500 with stepping "B2", E2xx0, E4x00, E7200 and E8190 models). On some implementations, IVT support may be switched off in the Firmware. This can be determined by checking if the VMX flag is enabled by the Feature Control MSR.

Documentation on the Intel website has stated that VT requires not only support from the processor, but also support from the chipset, BIOS, hypervisor, Guest OS (software drivers for e.g. NICs), NICs themselves (see Intel 10 Gb Server NICs with virtualization support) and sometimes software ^[8][9]

Intel plans to add a technology named Virtualization for Directed I/O (VT-d) to VT. This provides a way of configuring interrupt delivery to individual virtual machines and an IOMMU for preventing a virtual machine from using DMA to break isolation.

Intel also developed a technology named Intel Virtualization Technology for Connectivity ("VT-c") to VT. Intel Virtual Machine Device queues ("VMDq") is a component of VT-c. See this link
And then there is Intel Input/Output Acceleration Technology ("Intel I/OAT"). Intel® QuickData Technology is a component of Intel I/OAT.

Pentium 4 for VT

Pentium D supporting VT

"Presler" (dual core, 65 nm)

• All models support: MMX, SSE, SSE2, SSE3, Enhanced Intel SpeedStep Technology (EIST), Intel 64 (an x86-64 implementation), XD bit (an NX bit implementation)
• Virtualization Technology supported by: models 9x0
• Steppings: B1, C1 & D0

Model Number	sSpec Number	Freq	L2-Cache	Front Side Bus	Mult	Voltage	TDP		Release Date	Part Number
Pentium D 915	SL9DA (C1) SL9KB (D0)	2,8 GHz	2 × 2048 KiB	800 MT/s	14x	1.2/1.337 V	95 W		July 23, 2006	HH80553 PG0724MN
Pentium D 920	SL94S (B1) SL95Y (C1)	2,8 GHz	2 × 2048 KiB	800 MT/s	14x	1.2/1.337 V	95 W		January 16, 2006	HH80553 PG0724M
Pentium D 925	SL9D9 (C1) SL9KA (D0)	3,0 GHz	2 × 2048 KiB	800 MT/s	15x	1.2/1.337 V	95 W		October 2006	HH80553 PG0804MN
Pentium D 930	SL94R (B1) SL95X (C1)	3,0 GHz	2 × 2048 KiB	800 MT/s	15x	1.2/1.337 V	95 W		January 16, 2006	HH80553 PG0804M
Pentium D 935	SL9QR (D0)	3,2 GHz	2 × 2048 KiB	800 MT/s	16x	1.2/1.337 V	95 W		January 2007	HH80553 PG0884MN
Pentium D 940	SL94Q (B1)	3,2 GHz	2 × 2048 KiB	800 MT/s	16x	1.2/1.337 V	130 W		January 16, 2006	HH80553 PG0824M
	SL95W (C1)						95 W
Pentium D 945	SL9QB (C1) SL9QQ (D0)	3,4 GHz	2 × 2048 KiB	800 MT/s	17x	1.2/1.337 V	95 W		July 23, 2006	HH80553 PG0964MN
Pentium D 950	SL94P (B1)	3,4 GHz	2 × 2048 KiB	800 MT/s	17x	1.2/1.337 V	130 W		January 16, 2006	HH80553 PG0964M
	SL95V (C1)						95 W
	SL9K8 (D0)
Pentium D 960	SL9AP (C1)	3,6 GHz	2 × 2048 KiB	800 MT/s	18x	1.2/1.337 V	130 W		May 2, 2006	HH80553 PG1044M
	SL9K7 (D0)						95 W

"Presler" (dual core, 65 nm)

• All models support: MMX, SSE, SSE2, SSE3, Hyper-Threading, Enhanced Intel SpeedStep Technology (EIST), Intel 64 (an x86-64 implementation), XD bit (an NX bit implementation), Virtualization Technology
• Steppings: B1, C1

Model Number	sSpec Number	Frequency	L2-Cache	Front Side Bus	Mult	Uc,Uio	TDP		Release Date	Part Number
Pentium Extreme Edition 955	SL94N (B1)	3466 MHz	2 × 2048 KiB	1066 MT/s	13x	1.2/1.337 V	130 W		Jan 16, 2006	HH80553 PH0994M
Pentium Extreme Edition 965	SL9AN (C1)	3733 MHz	2 × 2048 KiB	1066 MT/s	14x	1.2/1.337 V	130 W		Mar 22, 2006	HH80553 PH1094M

the two types had an entry price of 999 US$

Pentium Extreme Edition