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Thursday, September 3, 2009

PCI Express x1 - PCI Express x16

Peripheral Component Interconnect
The most widely used I/O bus (peripheral bus).
It provides a shared data path between the CPU and peripheral controllers, such as network, display, SCSI and RAID cards.
Designed by Intel, Compaq and Digital, the PCI bus first appeared in PCs in 1993 and co-existed with the ISA bus for many years.
Today, most computers have only PCI slots along with one AGP or one PCI Express slot for the display adapter.
PCI Slots
PCI runs at 33 MHz or 66 MHz and supports 32 and 64-bit data paths and bus mastering.
There are generally three or four slots on the motherboard, and the quantity is based on 10 electrical loads that deal with inductance and capacitance.
The PCI chipset uses three, leaving seven for peripheral controllers.
A controller on the motherboard uses one load; a plug-in card uses 1.5 loads.
A "PCI bridge" connects PCI buses together for more slots.
PCI Shares Interrupts; ISA Did Not
On a PC, there is a limited number of hardware interrupts (IRQs), and the PCI bus is designed to share them. Thus, on a PCI-only PC, there is never an IRQ conflict as there was on earlier machines that used the ISA bus.
ISA cards required an assigned IRQ that was fixed to that peripheral device.
PCs with both ISA and PCI buses were made for several years. If there was only one IRQ remaining after the rest were reserved for ISA cards, all PCI devices could share it.
In such a dual bus PC, all reserved IRQs are registered in the PC's BIOS setup. On startup, PCI reads the setup memory and configures all PCI cards automatically.
For a comparison of PCI technologies, see PCI-SIG.
See PCI Express, PCI-X, Concurrent PCI, CompactPCI, PXI, Mini PCI, PC data buses, PICMG and Sebring ring.

Comparison of PCI bus speeds
Year Bus Size Clock Date Rate
Ver. Intro (bits) Speed MByte/sec

PCI - Parallel Shared
1.0 1992 32 33 Mhz 133
2.0 1993 32/64 33 Mhz 133/266
2.1 1995 32/64 66 Mhz 266/533.3
2.2 1998 32/64 66 Mhz 266/533.3
2.3 2002 32/64 66 Mhz 266/533.3

PCI-X 1.0 Parallel Shared
66 1999 32/64 66 Mhz 533

Year Bus Size Clock Date Rate
Ver. Intro (bits) Speed GByte/sec

PCI-X 1.0 Parallel or Shared or Point-to-Point
133 1999 32/64 133 Mhz .5/1.06

PCI-X 2.0 Parallel or Point-to-Point
266 2002 16/32/64 266MTs .5/1.06/2.13
533 2002 16/32/64 533MTs 1.06/2.13/4.26

PCI Express (PCX) - Serial Switched Point-to-Point
2002 x1 "2.5 Gbps .5
2002 x2 per 1.0
2002 x4 lane 2.0
2002 x8 per 4.0
2002 x16 direction" 8.0
2002 x32 16.0
MTs = megatransfers per second (see MT/sec).
Megatransfers are used when megahertz is not
accurate (not actual clock cycles).
PCI-X 266 is running at 133 MHz, but data are
double clocked.
PCI-X 533 is quadruple clocked.
PCI-X (PCI eXtended)
An enhanced PCI bus technology originally developed by IBM, HP and Compaq that is backward compatible with existing PCI cards. PCI and 32-bit PCI-X slots are physically the same, and PCI cards can plug into PCI-X slots. PCI-X cards will run in PCI slots, but at the slower PCI rates. The 64-bit PCI-X slots are longer.
First introduced in 1999, PCI-X offered increased speed over PCI and has steadily increased to more than 30 times that of the original PCI bus.
Do not confuse PCI-X with PCX, which is the abbreviation of PCI Express.

PCX (PCI Express)
A high-speed peripheral interconnect from Intel introduced in 2002. Note that although sometimes abbreviated "PCX," PCI Express is not the same as "PCI-X" (see PCI-SIG and PCI-X for comparison). As a result of the confusion, "PCI-E" or "PCIe" is the accepted abbreviation.
Initially used for high-speed display adapters, and intending to eventually replace the PCI and AGP buses entirely, PCI Express was designed to match the higher speeds of today's CPUs. It can accommodate Gigabit and 10 Gigabit Ethernet and even support chip-to-chip transfers.
Switched Architecture
Rather than the shared, parallel bus structure of PCI, PCI Express provides a switched architecture using serial communications channels, each made up of two differential wire pairs that provide 2.5 Gbits/sec in both directions. Up to 32 channels ("lanes") may be combined in x2, x4, x8, x16 and x32 configurations, creating a parallel interface of independently controlled channels. The bandwidth of the switch backplane determines the total capacity of a PCI Express implementation.
Internal in 2002, External in 2007
Similar in architecture to InfiniBand, PCI Express was initially designed for internal connections, whereas InfiniBand provides a true fabric architecture for external networks. However, enhancements that extended PCI Express outside of the box for several meters were developed in 2007. External PCI Express allows, for example, a laptop computer to hook up to an external display adapter and monitor, providing greater performance than the laptop's internal display adapter.
Different Slots
Originally called "Third Generation I/O" (3GIO), PCI Express is software compatible with PCI, but not plug compatible. It also uses slots of different lengths because of the combined lanes (see below). See ExpressCard and PCI-X.
PCI Express x16 Delivers greater than 3.5 times the performance over the traditional AGP 8X interface. It supports the latest graphics card for demanding games and applications.
PCI Express x1 Offers three and a half times the bandwidth over traditional PCI architecture. It enables smoother video recording and playback, and professional grade, high-definition content editing capability through the PC.

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