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Friday, July 4, 2008

Pentium 4 types (Codes)

List of the current revisions of the Intel Pentium 4 processor, and their differentiating characteristics.

Pentium 4 Processors, Designations, and Characteristics

Public Desig
nation
Core
(Intel Code
name)
CPU Frequency Frontside Bus Frequency / Theoretical Bandwidth Cache Additional Features
(ori-
ginal rel. revi-
sion)
Willamette 1.3 GHz - 2.0 GHz 100 MHz / 3.2 GB/s 8 KiB L1 data + 12 KiB L1 instruction / 256 KiB L2 N/A
P4A Northwood 1.6 GHz - 3.0 GHz 100 MHz / 3.2 GB/s 8 KiB L1 data + 12 KiB L1 instruction / 512 KiB L2 Improved branch prediction
and other microcodes tweaks;
these are carried
over into subsequent revisions
P4B Northwood 2.0 GHz - 3.06 GHz 133 MHz / 4.2 GB/s 8 KiB L1 data + 12 KiB L1 instruction / 512 KiB L2 No change
from P4A, except for Hyper
threading
in the
3.06 GHz model
P4C Northwood 2.4 GHz - 3.4+ GHz 200 MHz / 6.4 GB/s 8 KiB L1 data + 12 KiB L1 instruction / 512 KiB L2 Hypert
hreading
P4E Prescott 2.8 GHz - 3.8+ GHz 200 MHz / 6.4 GB/s 16 KiB L1 data + 12 KiB L1 instruction / 1 MiB L2 Hypert
hreading, longer
pipeline,
SSE3
instruc
tions
P4A* Prescott 2.4 and 2.8 GHz 133 MHz / 4.2 GB/s 16 KiB L1 data + 12 KiB L1 instruction / 1 MiB L2 No Hyper
threading, longer
pipeline,
SSE3 instructions
Extre
me Edition
Gallatin 3.2 GHz - 3.4 GHz 200 MHz / 6.4 GB/s 8 KiB L1 data + 12 KiB L1 instruction / 512 KiB L2 / 2 MiB L3 Hypert
hreading, addition
of on-die L3 cache
P4F Prescott 3.2 GHz - 3.8 GHz 200 MHz / 6.4 GB/s 16 KiB L1 data + 12 KiB L1 instruction / 1 MiB L2 Support of EM64T and eXecute Disable bit (equivalent of AMD's No eXecute bit)
6xx
series
Prescott 2MB** 2.8 GHz - 3.6 GHz 200 MHz / 6.4 GB/s 16 KiB L1 data + 12 KiB L1 instruction Per Core / Shared 2 MiB L2 Larger L2 cache, support of EM64T and SpeedStep
Pentium
D#
Smithfield 2.8 GHz - 3.2 GHz 200 MHz / 6.4 GB/s 16 KiB L1 data + 12 KiB L1 instruction Per Core / Shared 2 MiB L2 Support of EM64T and eXecute Disable bit (equivalent of AMD's No eXecute bit) Dual Core Processor
Notes:
Pentium 4 processors use a frontside bus that transfers data four times per cycle
* - in the case of the budget Prescott processor line, Intel duplicated the "P4A" designation which retailers are supposed to use to identify the processor to buyers; no reason was given for this decision
** - the official core name for the 600-series, though the core is sometimes called by its Xeon equivalent, Irwindale in order to distinguish between it and the initial Prescott.
# - the Pentium D consists of 2 Prescott cores on a single die.

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