Chipset technologiies

Chipset

A typical north/southbridge layout

The northbridge has historically been one of the two chips in the core logic chipset on aPC motherboard, the other being the southbridge. Increasingly these functions have migrated to the CPU chip itself, beginning with memory and graphics controllers. In Intel "Sandy Bridge" CPU designs introduced in 2011, all of the functions of the northbridge reside on the chip itself.^[1] When the separate northbridge is employed in older Intel systems it is named memory controller hub (MCH) or integrated memory controller (IMCH) if equipped with an integrated VGA.

Separating the chipset into the northbridge and southbridge is common, although in some instances the northbridge and southbridge functions were combined onto one die when design complexity and fabrication processes permitted it.

Contents   1 Overview

The northbridge typically handles communications among the CPU, in some cases RAM, and PCI Express (or AGP) video cards, and the southbridge.^[2][3]Some northbridges also contain integrated video controllers, also known as aGraphics and Memory Controller Hub (GMCH) in Intel systems. Because different processors and RAM require different signaling, a northbridge will typically work with only one or two classes of CPUs and generally only one type of RAM.

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The southbridge is one of the two chips in the core logic chipset on apersonal computer(PC) motherboard, the other being the northbridge. The southbridge typically implements the "slower" capabilities of the motherboard in a northbridge/southbridge chipset computer architecture. In Intel chipset systems the southbridge is named Input/Output Controller Hub (ICH).

The southbridge can usually be distinguished from the northbridge by not being directly connected to the CPU. Rather, the northbridge ties the southbridge to the CPU. Through the use of controller integrated channel circuitry, the northbridge can directly link signals from the I/O units to the CPU for data control and access.

Functionality

Diagram of a modern motherboard, which supports many on-board peripheral functions as well as several expansion slots.

The functionality found in a contemporary southbridge includes:

• PCI bus. The PCI bus support includes the traditional PCI specification, but may also include support forPCI-X and PCI Express.
• ISA bus or LPC Bridge. Though the ISA support is rarely utilized, it has interestingly managed to remain an integrated part of the modern southbridge. The LPC Bridge provides a data and control path to theSuper I/O (the normal attachment for the keyboard, mouse, parallel port, serial port,IR port, and floppy controller) and FWH (firmware hub which provides access to BIOS flash storage).
• SPI bus. The SPI bus is a simple serial bus mostly used for firmware (e.g.,BIOS) flash storage access.
• SMBus. The SMBus is used to communicate with other devices on the motherboard (e.g., system temperature sensors, fan controllers).
• DMA controller. The DMA controller allows ISA or LPC devices direct access to main memory without needing help from the CPU.
• Interrupt controllers such as 8259A and/or I/O APIC. The interrupt controller provides a mechanism for attached devices to get attention from the CPU.
• Mass storage controllers such as PATA and/or SATA. This typically allows direct attachment of system hard drives.
• Real-time clock. The real time clock provides a persistent time account.
• Power management (APM and ACPI). The APM or ACPI functions provide methods and signaling to allow the computer to sleep or shut down to save power.
• Nonvolatile BIOS memory. The system CMOS, assisted by battery supplemental power, creates a limited non-volatile storage area for system configuration data.
• AC'97 or Intel High Definition Audio sound interface.
• Out-of-band management controller such as a BMC or HECI.

Optionally, a southbridge also includes support for Ethernet, RAID, USB, audio codec, and FireWire. Rarely, a southbridge may also include support for the keyboard, mouse, and serial ports, but normally these devices are attached through another device referred to as the Super I/O.