Intel Processors and Technologies

Intel Core
Intel Core i7
Core (microarchitecture).
List of Intel Core microprocessors
List of Intel Core 2 microprocessors
List of Intel Core i3 microprocessors
List of Intel Core i5 microprocessors
List of Intel Core i7 microprocessors
List of future Intel microprocessors
The Intel QuickPath Interconnect (QuickPath, QPI)^[1][2][3] is a point-to-point processor interconnect developed by Intel which replaces the Front Side Bus (FSB) in Xeon, Itanium, and certain desktop platforms. It was designed to compete with HyperTransport. Intel first delivered it in November 2008 on theIntel Core i7-9xx desktop processors and X58 chipset. Intel developed QPI at its Massachusetts Microprocessor Design Center (MMDC) by members of what had been DEC's Alpha Development Group, which Intel acquired from Compaq and HP. Prior to the name's announcement, Intel referred to it asCommon System Interface (CSI). Earlier incarnations were known as YAP(Yet Another Protocol) and YAP+.

Contents 1 Implementation 2 QuickPath Interconnect frequency specifications 3 Protocol layers 3.1 Physical layer 3.2 Link layer 3.3 Routing layer 3.4 Transport layer 3.5 Protocol layer 4 See also 5 Notes 6 References 7 External links

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FDI or Flexible Display Interface is an interconnect created by Intel in order to allow the communication of the HD Graphics integrated GPU found on supported CPUs with the PCH southbridge where display connectors are attached. It provides a path between an Intel processor and an Intel southbridge on a computer motherboard which carries display data from the graphics controller (North Display) of the Intel processor package to the display connectors attached at some PCH (South Display) versions. It is based on DisplayPort standard. Currently it supports 2 independent 4-bit fixed frequency links/channels/pipes at 2.7GT/s data rate. It was first used with the 2010 Core i3, i5 processors and H55, H57, Q57, 3450 southbridges released in 2010. FDI enabled processors require FDI enabled southbridge in order to utilize the graphics controller capability thus P55 and PM55 based boards will not be able to take advantage of the graphics controller present on later processors. An FDI capable southbridge and CPU pair is not usable without the existence of the appropriate video connectors on the mainboard.
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The Direct Media Interface (DMI) is the link between an Intel northbridge and an Intel southbridge on a computer motherboard. It was first used between the 9xx chipsets and the ICH6, released in 2004. Previous chipsets had used the Hub Interface to perform the same function. Server chipsets use a similar interface called Enterprise Southbridge Interface (ESI). Some CPUs integrate the northbridge into the CPU and use a DMI interface to the southbridge.

DMI shares many characteristics with PCI-E, using multiple lanes and differential signalling to form a point-to-point link. Most implementations use a x4 link, while some mobile systems (eg. 915GMS, 945GMS/GSE/GU and theAtom N450) use a x2 link, halving the bandwidth. The original implementation provides 10Gb/s each direction (using a x4 link). DMI 2.0 (introduced in 2011) doubles the transfer rate to 20Gb/s with a x4 link.

While the interface has been called DMI since the ICH6, Intel specifies the specific combinations of devices that interwork, so the presence of a DMI interface does not itself guarantee that a particular northbridge is compatible with a particular southbridge.

Contents  [hide] 1 Protocol 2 Implementations 3 See also 4 References